Methods for forming the isolation structure of the semiconductor device and semiconductor devices
US10418282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2018 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | May 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/8314
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an isolation structure of a semiconductor device is provided. The method includes forming a patterned dielectric structure in a first area and a second area of a substrate; forming a first isolation structure in the first area and forming a second isolation structure in the second area of the substrate; forming a cap layer over the first area and the second area of the substrate and performing an etching process to etch the cap layer of the second area completely; and performing an oxidation process on the second area to form a first oxide region over the second isolation structure and under the bottom surface of the patterned dielectric structure of the second area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.