Patent · US Active

Induced warpage of a thermal conductor

US10418291B2 · kind B2 · utility

0Cited by

1References

10Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Jerrod Peterson · Hillsboro, US
David Pidwerbecki · Corvallis, US

Key dates

Filing date	Sep 29, 2017
Grant date	Sep 17, 2019
Priority date	—
Expiry date	Sep 29, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3511
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Particular embodiments described herein provide for a silicon layer, where the silicon layer includes a profile and a thermal conductor coupled to the silicon layer, where the thermal conductor includes one or more residual stresses. The thermal conductor is modified based on the one or more residual stress such that when pressure is applied to the thermal conductor, a profile of the thermal conductor at least approximately matches the profile of the silicon layer. In an example, the thermal conductor is modified by removing material from one or more areas of the thermal conductor and the thermal conductor is coupled to the silicon layer by one or more pressure inducing mechanisms.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.