Techniques for forming transistors on the same die with varied channel materials

US10418464B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Glenn A. Glass · Portland, US
• Anand S. Murthy · Beaverton, US
• Hei Kam · Sunnyvale, US
• Tahir Ghani · Portland, US
• Karthik Jambunathan · Hillsboro, US
• Chandra S. Mohapatra · Hillsboro, US

Key dates

• Filing date: Jun 12, 2015
• Grant date: Sep 17, 2019
• Expiry date: Jun 12, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0188
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques are disclosed for forming transistors on the same substrate with varied channel materials. The techniques include forming a replacement material region in the substrate, such region used to form a plurality of fins therefrom, the fins used to form transistor channel regions. In an example case, the substrate may comprise Si and the replacement materials may include Ge, SiGe, and/or at least one III-V material. The replacement material regions can have a width sufficient to ensure a substantially planar interface between the replacement material and the substrate material. Therefore, the fins formed from the replacement material regions can also have a substantially planar interface between the replacement material and the substrate material. One example benefit from being able to form replacement material channel regions with such substantially planar interfaces can include at least a 30 percent improvement in current flow at a fixed voltage.