Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays
US10418595B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 23, 2016 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | Aug 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/103
Abstract
Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.