Method for shift register digital in pixel unit cell
US10419699B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2018 |
| Grant date | Sep 17, 2019 |
| Priority date | — |
| Expiry date | Apr 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
According to one aspect, embodiments herein provide a digital unit cell comprising a photodiode, an integration capacitor coupled to the photodiode and configured to accumulate charge generated by the photodiode responsive to an input light signal incident on the photodiode over an integration period, a comparator coupled to the integration capacitor and configured to compare a voltage across the integration capacitor with a voltage reference and to generate a clock signal at a first level each time a determination is made that the voltage across the integration capacitor is greater than the voltage reference, a shift register coupled to the comparator and configured to receive the clock signal from the comparator and increase a count value each time the clock signal at the first level is received from the comparator, and an output coupled to the shift register and configured to provide the count value to an external system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.