Unidirectional clock signaling in a high-speed serial link
US10423567B2 · kind B2 · utility
9Cited by
38References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Feb 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/046
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Transmission of data over a serial link based on a unidirectional clock signal is provided. A unidirectional clock signal is generated based on a first clock of a master device. The unidirectional clock signal is sent to a slave device that is connected to the serial link. The master device transmits data to the slave device over the serial link based on the first clock. The slave device receives the unidirectional clock signal from a master device. The slave device transmits data over the serial link to the master device based on the unidirectional clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.