Method and apparatus for efficient and accurate signal electromigration analysis of digital-on-top designs with complex interface pin shapes
US10423753B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Nov 3, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach is described for efficient and accurate signal electromigration analysis of digital-on-top designs with complex interface pin shapes. According to some embodiments, the approach includes performance of parasitic analysis for the interface between nets and primitive/macro cell (blocks). Specifically, the approach includes performing parasitic analysis based on actual location information corresponding to overlap/connection between ports within blocks, external net connections to the ports, and internal net (block net) connections to the port. Thus, by determining the actual locations of the connections (as opposed to a presumed location) the parasitic effects associated with the ports and the connections thereof can be calculated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.