High-bandwidth STO bias architecture with integrated slider voltage potential control
US10424323B1 · kind B1 · utility
9Cited by
65References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2018 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Mar 12, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2005/0024
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are circuits, architectures, and methods that provide for the control of a data storage device write head's trailing shield and main pole potential with respect to the disk using circuitry that is integrated with circuitry used to bias a spin torque oscillator (STO) apparatus. Various embodiments include slider connections with STO bias circuitry that resides in a read/write integrated circuit, which has a programmable circuit that generates a bias current with overshoot (bias kicks). Also disclosed are circuits that may be incorporated into a slider to mitigate radio-frequency interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.