Interconnect structure and method for on-chip information transfer
US10424733B2 · kind B2 · utility
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6References
39Claims
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Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Nov 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure for on-chip information transfer, and a method for on-chip information transfer. The interconnect structure comprises a source configured for electrically generating plasmons; a detector configured for electrically detecting the generated plasmons; and a plasmonic waveguide coupled between the source and the detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.