Programable immediate frequency change for digital phase locked loop
US10425088B2 · kind B2 · utility
5Cited by
5References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 19, 2017 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Apr 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one or more embodiments, a method implemented by a digital phase-locked loop of a processor is provided. The method includes turning off, by the digital phase-locked loop, a percentage of active devices of a digitally controlled oscillator to implement a fast path within the digital phase-locked loop. The method also includes reducing, by the digital phase-locked loop, a multiplier of a frequency filter setting to implement a control path within the digital phase-locked loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.