Scan circuit unit, driving method thereof, gate drive circuit, and display apparatus
US10431144B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 2017 |
| Grant date | Oct 1, 2019 |
| Priority date | — |
| Expiry date | Nov 14, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A scan circuit unit includes a shift register unit; a first set of transistors operable to selectively transfer a first clock signal to a first output terminal in dependence on an output pulse signal of the shift register unit, and to selectively transfer an inactive level voltage to the first output terminal in dependence on a second clock signal; and a second set of transistors operable to selectively transfer the second clock signal to a second output terminal in dependence on the output pulse signal, and to selectively transfer the inactive level voltage to the second output terminal in dependence on the first clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.