Dual conversion gain high dynamic range readout for comparator of double ramp analog to digital converter
US10431608B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2017 |
| Grant date | Oct 1, 2019 |
| Priority date | — |
| Expiry date | Oct 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/481
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Example comparators as discussed herein may include a second stage coupled to provide an output in response to an intermediate voltage, a first stage coupled to provide the intermediate voltage in response to an input. The first stage including a pair of cascode devices coupled to a current mirror, a low gain input coupled to inputs of the first stage via first switches, and further selectively coupled to the pair of cascode devices via second switches, and a high gain input coupled to the first and second inputs of the first stage via the first switches, and further selectively coupled to the pair of cascode devices via fourth switches. Based on a low conversion gain mode, the low gain input may be coupled to the inputs by the first switches, and further coupled to the pair of cascode devices by the second switches in response to a control signal being in a first state, and based on a high conversion gain mode, the high gain input may be coupled to the first and second inputs by the first switches, and further coupled to the pair of cascode device by the fourth switch in response to the control signal being in a second state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.