Oversampled continuous-time pipeline ADC with digital signal reconstruction
US10432210B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2018 |
| Grant date | Oct 1, 2019 |
| Priority date | — |
| Expiry date | Jul 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/44
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Continuous-time pipeline analog-to-digital converters can achieve excellent performance, and avoid sampling-related artifacts traditionally associated with discrete-time pipeline ADCs. However, the continuous-time circuitry in the ADCs can pose a challenge for digital signal reconstruction, since the transfer characteristics of the continuous-time circuitry are not as well characterized or as simple as their discrete-time counterparts. To achieve perfect digital signal reconstruction, special techniques are used to implement an effective and efficient digital filter that combines the digital output signals from the stages of the CT ADCs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.