Patent · US Active

Technologies for scalable local addressing in high-performance network fabrics

US10432582B2 · kind B2 · utility

0Cited by
3References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 27, 2014
Grant dateOct 1, 2019
Priority date
Expiry dateDec 27, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2101/695
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Technologies for scalable local addressing include one or more managed network devices coupled to one or more computing nodes via high-speed fabric links. A computing node may transmit a data packet including a destination local identifier (DLID) that identifies the destination computing node. The DLID may be 32, 24, 20, or 16 bits wide. The managed network device may determine whether the DLID is within a configurable multicast address space and, if so, forward the data packet to a multicast group. The managed network device may also determine whether the DLID is within a configurable collective address space and, if so, perform a collective acceleration operation. The number of top-most bits set in a multicast mask and the number of additional top-most bits set in a collective mask may be configured. Multicast LIDs may be converted between different bit lengths. Other embodiments are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.