Data protecting method, memory control circuit unit and memory storage device
US10437484B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 25, 2016 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Dec 6, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data protecting method, a memory control circuit unit and a memory storage device are provided. The method includes repeatedly reading data from a first physical programming unit of a first physical erasing unit during an initialization operation after the memory storage device is powered on, wherein the first physical programming unit is the last programmed physical programming unit before the memory storage device is powered off. The method also includes updating a logical-physical mapping table according to the first physical programming unit if a number of error bits of data read each time is not greater than an error bits amount threshold and a reading count of the first physical programming unit is greater than a predetermined count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.