Remote direct memory access in computing systems
US10437775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2017 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Jun 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/161
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Distributed computing systems, devices, and associated methods of remote direct memory access (“RDMA”) packet routing are disclosed herein. In one embodiment, a server includes a main processor, a network interface card (“NIC”), and a field programmable gate array (“FPGA”) operatively coupled to the main processor via the NIC. The FPGA includes an inbound processing path having an inbound packet buffer configured to receive an inbound packet from the computer network, a NIC buffer, and a multiplexer between the inbound packet buffer and the NIC, and between the NIC buffer and the NIC. The FPGA also includes an outbound processing path having an outbound action circuit having an input to receive the outbound packet from the NIC, a first output to the computer network, and a second output to the NIC buffer in the inbound processing path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.