Circuit for removing residual image after power-off, method for driving same, and display apparatus
US10438546B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 6, 2017 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Feb 6, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/027
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The embodiments of the present disclosure provide a circuit for removing residual image after power-off, a method for driving the circuit, and a display apparatus. The circuit comprises a comparator, a control circuit and an output circuit. The comparator is configured to output a high level voltage when a voltage at its non-inverting terminal is higher than a voltage at its inverting terminal, or output a low level voltage when the input voltage at its non-inverting terminal is lower than or equal to the input voltage at its inverting terminal. The control circuit is configured to align a voltage at the control node with a voltage at the second level terminal when the comparator outputs the high level voltage, and align the voltage at the control node with a voltage at the third level terminal when the comparator outputs the low level voltage. The output circuit is configured to output a voltage of the fourth level terminal at the signal output terminal when the voltage at the control node is the voltage at the third level terminal, and output a voltage of the fifth level terminal at the signal output terminal when the voltage at the control node is the voltage at the second level…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.