Semiconductor device having ESD element
US10438944B2 · kind B2 · utility
0Cited by
6References
4Claims
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Assignee
Inventor
Key dates
| Filing date | Jul 8, 2015 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Jul 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
When an ESD element is operated, for the purpose of suppressing heat generation and causing uniform current to flow through all channels of all transistors included in the ESD element, various substrate potentials existing in the transistors and the channels of a multi finger type ESD element are electrically connected via a low resistance substrate, and further, are set to a potential that is different from a Vss potential. In this manner, the current is uniformized and heat generation is suppressed through low voltage operation to improve an ESD tolerance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.