Duty locked loop circuit
US10439597B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2018 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Apr 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.