Scramble of payload and preamble in 10SPE with synchronous and self-synchronous scrambling
US10440160B2 · kind B2 · utility
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20Claims
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Assignee
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Key dates
| Filing date | Jun 13, 2018 |
| Grant date | Oct 8, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/323
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an encoder circuit and a scrambler circuit configured to receive a frame, the frame including a preamble and a payload. The scrambler circuit is further configured to scramble contents of the frame including the payload and at least a portion of the preamble, provide synchronization information with results of scrambling the contents, and send results of scrambling the contents to the encoder circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.