Optoelectronic semiconductor chip
US10446717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2016 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | May 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/814
Abstract
An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes at least one n-doped semiconductor layer, at least one p-doped semiconductor layer and an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer, wherein the p-doped semiconductor layer is electrically contacted by a p-type connection contact, wherein a first trench extending at least partially into the p-doped semiconductor layer is arranged below the p-type connection contact, wherein an electrically insulating first blocking element arranged at least partially below the p-type connection contact and at least partially within the trench is arranged at least between the n-doped semiconductor layer and the p-type connection contact, and wherein the electrically insulating first blocking element is configured to prevent a direct current flow between the p-type connection contact and the p-doped and n-doped semiconductor layers and the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.