PWM control scheme for providing minimum on time
US10447154B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Jul 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/072
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
According to certain aspects, the present embodiments are based on an improved switched-capacitor (SC) converter topology that typically does not include an inductor. In particular, the topology includes a ladder SC circuit configured as a cap divider. The cap divider can be used to provide an unregulated output voltage Vout that is a certain fraction (e.g. 2) of input voltage Vin, such as Vin/2 (i.e., duty cycle≈50%). In some embodiments of a PWM control scheme for this topology, the PWM OFF pulse is free running, determined by the logic combination of timer and VOUT comparator. The PWM OFF pulse width is measured and used as the reference for a minimum PWM ON timer. The PWM ON pulse is therefore forced to be at least a minimum width that is proportional to the PWM OFF pulse. A UVOV protection window can be added to ignore the minimum PWM ON timer during a load transient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.