Phase locked loop (PLL)
US10447282B2 · kind B2 · utility
1Cited by
4References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2018 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Jan 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/152
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase locked loop (PLL) includes a first charge pump coupled to a filter. The first charge pump may feed the filter a first current. A second charge pump is coupled to the filter. The second charge pump may feed the filter a second current. A first gate is coupled to an input of the second charge pump. The first gate selectively gates the second current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.