Reduced-stage polar decoding
US10447435B2 · kind B2 · utility
3Cited by
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16Claims
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Key dates
| Filing date | Jul 17, 2017 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | Jul 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W88/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In reduced-stage polar decoding, a received word that is based on an N-bit codeword of a polar code is decoded using fewer than log2N Log Likelihood Ratio (LLR) stages. Decoding uses a reduced stage decoding configuration. In an embodiment, such a configuration includes at least one higher-order LLR stage with nodes implementing functions that are based on a combination of lower-order polar code kernels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.