Patent · US Active

Packet parsing engine

US10447823B2 · kind B2 · utility

0Cited by

4References

16Claims

0Family size

Assignee

Marvell Semiconductor, Inc. · US

Inventors

Wilson P. Snyder, II · Hudson, US
Daniel A. Katz · Holliston, US
Varada Ogale · Framingham, US

Key dates

Filing date	Jan 8, 2014
Grant date	Oct 15, 2019
Priority date	—
Expiry date	Nov 3, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH04L69/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A packet parsing engine comprises a DMEM configured to store packet data; one or more registers configured to store parsing instructions or parse results; and one or more arithmetic logic units configured to parse the packet data based on the parsing instructions and to derive the parse results. The engine may be one engine of a plurality of engines configured to access a shared memory, and the engine may be configured to receive data from the shared memory or to send data to the shared memory. The DMEM may be divided into subsections, and at least one of the one or more registers may be divided into subsections, and the subsections may be configured such that while a DMEM subsection and its corresponding register subsection is parsing packet data for a first packet, one or more other subsections load packed data or unload parse results for a second packet.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.