Crossbar switch with pipeline delay registers
US10452585B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2016 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Apr 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples herein relate to crossbar switches and related circuitry. An example crossbar switch includes a plurality of abutted tiles forming a crossbar. The plurality of abutted tiles includes a plurality of edge tiles and at least one middle tile, where each side of each middle tile abuts an edge tile or another middle tile. Each middle tile includes data inputs connected to data outputs, switched data inputs connected to switched data outputs, and pipeline delay registers coupled to data inputs and switched data outputs to allow transmission of a data signal to change directions inside each middle tile. Each edge tile includes a crossbar input, a crossbar output, and a set of inputs, outputs, and pipeline delay registers to allow transmission of data signals from any side of the edge tile to any other side of the edge tile.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.