System and method for electronic design space tuning
US10452799B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2017 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Dec 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a system and method for use with an electronic circuit design. The method may include providing, using at least one processor, an electronic design and modeling the electronic design to obtain a characteristic distribution associated with the electronic design, wherein modeling includes randomly varying one or more parameters associated with the electronic design. The method may further include identifying at least one key parameter from the modeled electronic design and reducing the electronic design only to the at least one key parameter. The method may also include in response to reducing, randomly varying the one or more parameters and re-modeling the reduced electronic design with the randomly varied one or more parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.