Monitoring a memory for retirement
US10453547B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2017 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Jun 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods presented herein provide for monitoring block, page, and/or stripe degradation. In one embodiment, a controller is operable to scan a first block of memory to identify a failure in a portion of the first block. The controller suspends input/output (I/O) operations to the failed portion of the first block, and tests the failed portion of the first block to determine if the failure is a transient failure. Testing includes loading the portion of the first block with data, and reading the data from the loaded portion of the first block. If the failure subsides after testing, the controller is further operable to determine that the failure is a transient failure, and to resume I/O operations to the portion of the first block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.