Patent · US Active

Integrated delay modules

US10454444B2 · kind B2 · utility

1Cited by

167References

18Claims

0Family size

Assignee

Kumu Networks, Inc. · US

Inventors

Wilhelm Steffen Hahn · Schonach, DE
Alfred Riddle · Sunnyvale, US
Ernie Landi · Sunnyvale, US

Key dates

Filing date	May 10, 2018
Grant date	Oct 22, 2019
Priority date	—
Expiry date	May 10, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH03H2001/0085
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An analog time delay filter circuit including a first delay circuit block arranged in a modular layout, having a first time delay filter, a first input, a first output, and first and second pass-throughs; and a second delay circuit block arranged in the same modular layout, having a second time delay filter, a second input, a second output, and third and fourth pass-throughs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.