Embedded FPGA with multiple configurable flexible logic blocks instantiated and interconnected by abutment
US10454480B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2018 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Oct 30, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embedded field programmable gate array (EFPGA) includes several abuttable configurable logic blocks (ACLBs). Each ACLB is interconnected with adjacent ACLBs by abutment of an out pin to an adjacent in pin. Each ACLB may be an instance of multiple programmable functional blocks. Each ACLB may be a particular ACLB type that provides a particular instance of the multiple programmable functional blocks. The EFPGA may include several ACLBs of the same type. An ACLB of one type may be adjacent an ACLB of a different type. The ACLBs may form sets that are configured identically. The sets may be interconnected by abutment of an out pin to an adjacent in pin. The EFPGA may be part of a system-on-chip integrated circuit. A method for designing an EFPGA with ACLBs that are interconnected by abutment is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.