Apparatus and method for de-jitter buffer delay adjustment
US10454811B2 · kind B2 · utility
2Cited by
9References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2017 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Jul 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/30
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus includes de-jitter buffer control circuitry configured to determine an arrival delay value based on previously received audio packets, to identify a receive time of a first audio packet of a talk spurt, to determine an offset value of the first audio packet based on the receive time and the arrival delay value, and to adjust a target delay value associated with a de-jitter buffer based on the offset value. The apparatus also includes a de-jitter buffer configured to buffer the first audio packet based on the adjusted target delay value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.