Encryption device, computer-readable recording medium, and encryption method
US10455111B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2017 |
| Grant date | Oct 22, 2019 |
| Priority date | — |
| Expiry date | Jan 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2201/3281
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An encryption circuit includes a fundamental vector generation circuit configured to generate a random number sequence for serving as a fundamental vector based on an initial vector, an image mask generation circuit configured to generate an image mask with a mask value set for each pixel in a region to be encrypted smaller than a frame size of the image, based on the fundamental vector and coordinate information for specifying the region to be encrypted, and an XOR operation circuit configured to compute an exclusive OR between each mask value of the image mask and each pixel value of the image data to generate encrypted image data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.