Photonic chip with folding of optical path and integrated collimation structure
US10459163B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2018 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Nov 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/187
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A photonic chip comprising a light guiding layer supported by a substrate and covered with an encapsulation layer. The chip has a front face on the side of the encapsulation layer and a back face on the side of the substrate. The light guiding layer includes a light guiding structure optically coupled to a vertical coupler configured to receive light from the waveguide and to form a light beam directed towards either the front face or the back face. The chip also comprises a collimation structure formed at least partly in the light guiding layer and an arrangement of one or several reflecting structures each on either the front face or on the back face. This arrangement is made so as to assure propagation of light between the vertical coupler and the collimation structure along an optical path with at least one fold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.