Compensated comparator
US10461726B2 · kind B2 · utility
1Cited by
8References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 31, 2018 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Dec 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0966
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A compensated comparator is provided, including a decision stage and a differential stage provided with two transistors connected by their sources, the differential stage being provided with compensation means to compensate the effects of a dispersion of the threshold voltages of the transistors forming the differential stage, the compensation means including first and second capacitors each connected to a gate of one of the two transistors, and being configured to memorize a voltage that is a function of a threshold voltage of the considered transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.