Implementing embedded wire repair for PCB constructs
US10462901B1 · kind B1 · utility
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12References
8Claims
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Assignee
Inventors
Key dates
| Filing date | Jul 26, 2018 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Jul 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/173
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.