Information processing apparatus
US10467176B2 · kind B2 · utility
4Cited by
1References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2015 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Feb 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information processing device having a processor and memory, and including one or more accelerators and one or more storage devices, wherein: the information processing device has one network for connecting the processor, the accelerators, and the storage devices; the storage devices have an initialization interface for accepting an initialization instruction from the processor, and an I/O issuance interface for issuing an I/O command; and the processor notifies the accelerators of the address of the initialization interface or the address of the I/O issuance interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.