Embedded non-volatile memory with single polysilicon layer memory cells erasable through band to band tunneling induced hot electron and programmable through Fowler-Nordheim tunneling
US10468425B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2015 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Aug 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
Abstract
A non-volatile memory includes cells arranged in rows and columns. Each memory cell includes an access portion and a control portion. The access and control portions share an electrically floating layer of conductive material defining a first capacitive coupling with the access portion and a second capacitive coupling with the control portion. The first capacitive coupling defines a first capacity lower than a second capacity defined by the second capacitive coupling. The control portion is configured so that an electric current extracts charge carriers from the electrically floating layer through Fowler-Nordheim tunneling to store a first logic value in the memory cell. The access portion is configured so that an electric current injects charge carriers in the electrically floating layer by injection of band-to-band tunneling-induced hot electrons to store a second logic value, respectively, in the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.