Semiconductor device
US10468431B2 · kind B2 · utility
0Cited by
6References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 5, 2018 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Jul 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.