Integrated circuit including ferroelectric memory cells and methods for manufacturing
US10468495B2 · kind B2 · utility
3Cited by
1References
18Claims
0Family size
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Key dates
| Filing date | Aug 11, 2016 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Aug 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/033
Abstract
Integrated circuits including a ferroelectric memory cell and methods for manufacturing the same. One embodiment of the memory cells include three main layers: a first oxide ferroelectric layer, a second oxide anti-ferroelectric layer, and a covering layer. The ferroelectric material of the first and second oxides include as main components oxygen and any of the group containing Hf, Zr, and (Hf, Zr).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.