Patent · US Active

Method and apparatus of dead time tuning in an inverter

US10468974B2 · kind B2 · utility

1Cited by

4References

20Claims

0Family size

Assignee

Hong Kong Applied Science and Technology Research Institute Company Limited · CN

Inventors

Hang Sang Lee · Shanghai, CN
Yan Liu · Beijing, CN

Key dates

Filing date	Jan 23, 2019
Grant date	Nov 5, 2019
Priority date	—
Expiry date	Jan 23, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH03K2017/0806
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

A method that prevents overload to input source and reduces parasitic inductance in an inverter circuit with dead-time control. A sensing capacitor senses temperatures of transistors in the inverter circuit. A delay generator changes delay times in response to receiving the temperatures of the transistors from the sensing capacitor. A dead time generation unit changes the dead times for the transistors in response to changes in the delay times.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.