Multi-stage amplifier circuit with zero and pole inserted by compensation circuits
US10469037B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/456
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier circuit has a multi-stage amplifier, a compensation capacitor, and compensation circuits. The multi-stage amplifier has amplifiers cascaded between an input port and an output port of the multi-stage amplifier. The amplifiers include at least a first-stage amplifier, a second-stage amplifier and a third-stage amplifier. The compensation capacitor is coupled between the output port of the multi-stage amplifier and an output port of the first-stage amplifier. The compensation circuits include a first compensation circuit and a second compensation circuit. The first compensation circuit is coupled to the output port of the first-stage amplifier. The second compensation circuit is coupled to an output port of the second-stage amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.