Multi-level gate control for transistor devices
US10469065B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2018 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Mar 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/47
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for operating a transistor device that acts as a switch is presented. The circuit includes the transistor device and a control circuit coupled to a gate of the transistor device. The control circuit is adapted to selectively apply at least a first voltage level, a second voltage level, and a third voltage level to the gate of the transistor device, wherein the first, second, and third voltage levels are distinct voltage levels. The disclosure further relates to a method of operating a transistor device that acts as a switch. The proposed circuit provides additional gate voltages, by contrast to conventional two-level gate drivers. By appropriate choice of the additional gate voltages, reverse mode conductance losses of the transistor device can be reduced and/or to the Safe Operating Area (SOA) of the transistor device can be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.