High-speed low-power-consumption optical transceiver chip
US10469173B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 2019 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B10/40
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A single-channel high-speed low-power-consumption optical transceiver chip is provided, which comprises an optical transmitter module, an optical receiver module, and a common module, wherein the optical transmitter module comprises a data buffer, a first clock and data recovery unit, a first data selector, a laser driver, a power controller, a first clock buffer, a light-emitting diode, and a first photodiode; the optical receiver module comprises a second photodiode, a direct-current bias module, a transimpedance amplifier, a feedback resistor, a second clock and data recovery unit, a second clock buffer, a second data selector, and an output driver; the common module comprises a power supply controller, a direct-current bias, a logic controller, a serial interface, a memory, and a pseudo random data generator and checker; and the common module also provides a communication loop for the optical transmitter module and the optical receiver module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.