Voltage monitor
US10473698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2016 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Jul 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/2481
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A voltage monitor circuit comprises: a monitored voltage input (42); a reference capacitor (32) arranged to be able to store a value of the monitored voltage as a reference capacitor voltage; a timeout capacitor (34) arranged to be able to store a value of the monitored voltage as a timeout capacitor voltage. The timeout capacitor undergoes a higher leakage than the reference capacitor. The voltage monitor circuit also comprises a comparator (2) arranged to: compare the monitored voltage to the reference capacitor voltage; compare the timeout capacitor voltage to the reference capacitor voltage; and produce a logic signal on an output (9) of the comparator based on said comparisons, the logic signal having a first logic value at least if the reference capacitor voltage is lower than or equal to both the monitored voltage and the timeout capacitor voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.