Enabling system low power state when compute elements are active
US10474219B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2015 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Apr 15, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus to permit a system low power consumption state when CPU (Central Processing Unit) or generically any compute element is active are described. In an embodiment, a fabric and a memory controller are caused to enter a low power consumption state at least partially in response to a determination that the fabric and the memory controller are idle. The entry into the low power consumption state occurs while a compute element, coupled to the fabric and the memory controller, is in an active state. Other embodiments are also disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.