Error checking and correcting decoding method and apparatus
US10474529B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2017 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Nov 9, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An error checking and correcting (ECC) decoding method and apparatus are provided. A decoding circuit decodes a codeword using (or without using) reference information, wherein when the decoding circuit fails to decode a first codeword, the decoding circuit decodes a second codeword to produce decoded data. The decoding circuit checks whether a change has occurred from each codeword bit of the second codeword to a corresponding bit of the decoded data. In accordance with a bit position of the changed corresponding bit, the decoding circuit correspondingly changes the first codeword to a modified codeword, and/or correspondingly changes the reference information to modified information. The decoding circuit performs the ECC decoding again on the modified codeword (or the first codeword) using (or without using) the modified information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.