Flashware usage mitigation
US10474570B2 · kind B2 · utility
0Cited by
7References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2015 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Nov 24, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a memory control process of a device receives a plurality of program/erase (P/E) requests for a flash memory of the device. The memory control process then stores data associated with the plurality of P/E requests in a random access memory (RAM) of the device, and aggregates the plurality of P/E requests into a single P/E operation. The memory control process may then send the single P/E operation to the flash memory at a given interval to update the flash memory with the data stored in the RAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.