System and method for controlling cache flush size
US10474583B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2016 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Apr 28, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information handling system may implement a method for controlling cache flush size by limiting the amount of modified cached data in a data cache at any given time. The method may include keeping a count of the number of modified cache lines (or modified cache lines targeted to persistent memory) in the cache, determining that a threshold value for modified cache lines is exceeded and, in response, flushing some or all modified cache lines to persistent memory. The threshold value may represent a maximum number or percentage of modified cache lines. The cache controller may include a field for each cache line indicating whether it targets persistent memory. Limiting the amount of modified cached data at any given time may reduce the number of cache lines to be flushed in response to a power loss event to a number that can be flushed using the available hold-up energy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.