Patent · US Active

Identifying a layout error

US10474887B2 · kind B2 · utility

2Cited by

5References

11Claims

0Family size

Assignee

Micro Focus LLC · US

Inventors

Amit Levin · Yehud Monosson, IL
Yaron Burg · Yehud Monosson, IL
Ilan Shufer · Yehud Monosson, IL
Olga Kogan · Yehud Monosson, IL

Key dates

Filing date	Jan 10, 2017
Grant date	Nov 12, 2019
Priority date	—
Expiry date	Mar 31, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06V30/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

First object model data from a first application state generated in a first browser mode may be collected. The first object model data may comprise a code-based representation of a first layout element and a second layout element of the first application state. According to a layout detection rule, a first attribute of the first layout element may be compared with a second attribute of the first layout element or of a second layout element. A layout error corresponding to the first layout element may be identified based on the comparison of the first attribute with the second attribute.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.