Semiconductor device including a capacitor structure and method for manufacturing the same
US10475661B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | Nov 12, 2019 |
| Priority date | — |
| Expiry date | Jun 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes providing a substrate structure. The method includes forming a lower sacrificial layer, a lower supporter layer, an upper sacrificial layer, and an upper supporter layer which are sequentially stacked on the substrate structure. The method includes forming a mask pattern on the upper supporter layer; forming an upper supporter pattern by etching the upper supporter layer using the mask pattern as an etch mask. The method includes forming a recess region penetrating the upper supporter pattern, the upper sacrificial layer, the lower supporter layer, and the lower sacrificial layer, and removing the lower sacrificial layer and the upper sacrificial layer. The mask pattern is removed during the process of forming the upper supporter pattern. And, when the process of forming the recess region ends, the upper supporter pattern remains.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.